$$ \begin{aligned} D_{\text{max,dec}} &= 2^N-1 \\ D_{\text{max,bin}} &= \underbrace{11\ldots1}_{N\ \text{bits}} \\ D_{\text{max,hex}} &= \text{Hexadecimal representation of } (2^N-1) \end{aligned} $$
$$ \begin{aligned} D_{\text{dec}} &= \begin{cases} D_{OB}, & \text{Offset Binary} \\ D_{OB}-2^{N-1}, & \text{Two’s Complement} \end{cases} \\ \\ D_{\text{bin}} &= \text{Binary representation of } D_{\text{dec}} \\ D_{\text{hex}} &= \text{Hexadecimal representation of } D_{\text{dec}} \\ \\ V_q &= V_{ref-}+D_{OB}\cdot \text{LSB} \\ E_q &= V_{diff}-V_q \end{aligned} $$
$$ \begin{aligned} N &= \text{Resolution (bits)} \\ V_{ref+} &= \text{Positive Reference Voltage} \\ V_{ref-} &= \text{Negative Reference Voltage} \\ V_{in+} &= \text{Positive Input Voltage} \\ V_{in-} &= \text{Negative Input Voltage} \\ V_{diff} &= \text{Differential Input Voltage} \\ \text{LSB} &= \text{Least Significant Bit Size} \\ D_{OB} &= \text{Offset Binary Code} \\ D_{\text{max}} &= \text{Maximum Digital Code} \\ D_{\text{dec}} &= \text{Digital Output Code (Decimal)} \\ D_{\text{bin}} &= \text{Digital Output Code (Binary)} \\ D_{\text{hex}} &= \text{Digital Output Code (Hexadecimal)} \\ V_q &= \text{Quantized Output Voltage} \\ E_q &= \text{Quantization Error} \end{aligned} $$
Output Coding Format:
Differential ADCs can represent their digital output in different binary formats. Understanding these formats is essential for correctly interpreting ADC results and avoiding apparent “errors” when comparing with real hardware. In this calculator, two binary formats are used, as explained below.
Absolute Binary (Offset Binary) Output:
Absolute binary, also known as offset binary, is a commonly used ADC output coding where:
- The minimum input corresponds to all zeros
- The maximum input corresponds to all ones
- Zero differential input maps to mid-scale
For $N$-bit binary
$$D_{OB} \in [0,\; 2^N – 1]$$Example (12-bit ADC):
| Condition | Output |
| Minimum Input | 0000 0000 0000 |
| Zero Differential | 1000 0000 0000 |
| Maximum Output | 1111 1111 1111 |
Applications: Offset binary is used in SAR ADCs, Pipeline ADCs, Unipolar, and bipolar ADCs with digital offset
Two’s Complement Output:
Two’s complement is a signed binary representation commonly used in digital signal processing and microcontrollers.
For $N$-bit binary
$$D_{TC} \in [-2^{N-1},\; 2^{N-1}-1]$$- Zero differential input maps to zero code
- Positive inputs produce positive codes
- Negative inputs produce negative codes
Example (12-bit ADC):
| Condition | Output | |
| Full Negative | -2048 | 1000 0000 0000 |
| Zero Differential | 0 | 0000 0000 0000 |
| Full Positive | +2047 | 0111 1111 1111 |
Applications: Two’s complement is used in $\Delta – \Sigma$ ADCs, Audio ADCs, Precision measurement, DSP-oriented Systems
Quantization Method:
This calculator uses a floor (truncate) quantization model.
$$D = \left\lfloor \frac{V_{in}}{\text{LSB}} \right\rfloor$$Example: Truncate (floor) quantization:
Lets define few input parameters.
$Resolution: N = 12\ \text{bits} \;\Rightarrow\; 2^{12} = 4096) codes$
$Positive Reference: V_{\text{ref}+} = +2048\;\mathrm{mV} $
$Negative Reference: V_{\text{ref}-} = -2048\;\mathrm{mV} $
$Input Voltage: V_{\text{in}} = 123.7\mathrm{\thinspace mV} $
$Quantization Model: \text {Floor (truncate)} $
Full-scale and LSB:
$$ \begin{aligned} V_{FS} &= V_{\text{ref}+} – V_{\text{ref}-} = 2048 – (-2048) = 4096\;\mathrm{mV} \\ \mathrm{LSB} &= \frac{V_{FS}}{2^N} = \frac{4096}{4096} = 1\;\mathrm{mV} \end{aligned} $$
Compute ideal code:
$$ \begin{aligned} D_{\text{ideal}} &= \frac{V_{\text{in}} – V_{\text{ref}-}}{\text{LSB}} \\ &= \frac{123.7 – (-2048)}{1} \\ &= 2171.7 \end{aligned} $$
Apply floor (truncate):
$$ \begin{aligned} D_{\text{floor}} &= \left\lfloor D_{\text{ideal}} \right\rfloor \\ &= \left\lfloor 2171.7 \right\rfloor \\ &= 2171 \end{aligned} $$
Floor truncates toward zero for positive numbers, ignoring the fractional part. Rounding would have given 2172.
$$ \begin{aligned} D_{\text{floor}} &= 2171 \\ &\Rightarrow 0b100001111011 \end{aligned} $$
Quantized Voltage: $$ \begin{aligned} V_q &= V_{\text{ref}-} + D_{\text{floor}} \cdot \mathrm{LSB} \\ &= -2048 + 2171 \cdot 1 \\ &= 123\;\mathrm{mV} \end{aligned} $$
Quantization Error: $$ \begin{aligned} E_q &= V_{\text{in}} – V_q \\ &= 123.7 – 123 \\ &= 0.7\;\mathrm{mV} \end{aligned} $$
Quantization error exactly less than 1 LSB, truncated downward.
Hardware Realism and Practical Limitations:
This calculator models an ideal differential ADC. In practical hardware, ADC performance deviates from the ideal transfer function due to several non-ideal effects, including offset error, gain error, integral nonlinearity (INL), differential nonlinearity (DNL), reference voltage drift, thermal noise, and quantization noise.
As a result, the digital output code produced by a real ADC may differ slightly from the theoretical value calculated here, particularly near code transition boundaries and at extreme input levels.